An automatic circuit generation methods and apparatus (1) provide a desired circuit performance by reducing a leakage current during both a standby state and an active state, where cells having only High-Vth and Mt cells having both High-Vth transistors and Low-Vth transistors are optimally mixed in a logical circuit. It is thereby possible to suppress efficiently the leakage current, in a design stage, generated according to miniaturization of LSI layout design and also lowering a supply voltage to the LSI. IMAGE
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