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Structure and method for forming inter-poly dielectric in a shielded gate field effect transistor
Structure and method for forming inter-poly dielectric in a shielded gate field effect transistor
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机译:在屏蔽栅场效应晶体管中形成多晶硅间电介质的结构和方法
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摘要
A shielded gate trench FET is formed as follows. A trench is formed in a silicon region of a first conductivity type, the trench including a shield electrode insulated from the silicon region by a shield dielectric. An inter-poly dielectric (IPD) including a layer of thermal oxide and a layer of conformal dielectric is formed along an upper surface of the shield electrode. A gate dielectric lining at least upper trench sidewalls is formed. A gate electrode is formed in the trench such that the gate electrode is insulated from the shield electrode by the IPD.
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