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Semiconductor CMOS devices and methods with NMOS high-k dielectric present in core region that mitigate damage to dielectric materials

机译:核心区域中存在NMOS高k电介质的半导体CMOS器件和方法,可减轻对电介质材料的损坏

摘要

The present invention facilitates semiconductor fabrication by providing methods of fabrication that selectively form high-k dielectric layers within NMOS regions. An I/O dielectric layer is formed in core and I/O regions of a semiconductor device (506). The I/O dielectric layer is removed (508) from the core region of the device. A core dielectric layer is formed in the core region (510). A barrier layer is deposited and patterned to expose the NMOS devices of the core region (512). The core dielectric layer is removed from the core NMOS devices (514). A high-k dielectric layer is formed (514) over the core and I/O regions. Then, the high-k dielectric layer is removed (512) from PMOS regions/devices of the core region and the NMOS and PMOS regions/devices of the I/O region.
机译:本发明通过提供在NMOS区域内选择性地形成高k电介质层的制造方法来促进半导体制造。在半导体装置( 506 )的核心和I / O区域中形成I / O介电层。 I / O介电层已从设备的核心区域移除( 508 )。在芯区域( 510 )中形成芯介电层。沉积并构图阻挡层,以暴露核心区域( 512 )的NMOS器件。从核心NMOS器件( 514 )中除去核心介电层。在核心和I / O区域上方形成了一个高k介电层( 514 )。然后,从核心区域的PMOS区域/器件以及I / O区域的NMOS和PMOS区域/器件中去除(k> 512 )高k介电层。

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