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A maximum of digitized fraction proportional - n frequency synthesizer and modulator with maximum suppression of the fractional spurs
A maximum of digitized fraction proportional - n frequency synthesizer and modulator with maximum suppression of the fractional spurs
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机译:具有最大抑制分数杂散的数字化分数比例-n频率合成器和调制器的最大值
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摘要
A fractional-N frequency synthesizer is suggested. The synthesizer uses the Delta-Sigma frequency discriminator to convert the high frequency signal to digital format. The main feature of the invention is that the feedback error signal is generated by comparing the output bit stream from the discriminator with a bit stream digitally generated by performing Delta-Sigma modulation to the required fractional number. This makes the fractional spurious maximally reduced and be much predicable. Other synthesizer performance could also be very good as the result of low noise from a very simple high frequency circuit and the flexibility and precision from the maximally application of digital signal processing technique. Besides, the structure is especially suitable for adding the wideband modulation simultaneously.
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