A multi-band fractional-N frequency synthesizer using binary-weighted digital/analog differentiator and offset-frequency delta-sigma modulator for noise and spurs cancellation.

摘要

A compact 0.8-6GHz fractional-N frequency synthesizer covering IEEE 802.11abg, PCS/DCS and cellular bands is presented in this work. Two techniques are proposed to cancel quantization noise and reduce fractional spurs in Delta--Sigma fractional-N synthesizer. Binary-weighted 2nd order D/A differentiator achieves 2 nd order mismatch shaping and reduces the quantization noise by 25dB. It also has advantages of smaller numbers of DAC to rout, insensitivity to process variation and requiring no digital signal process for dynamic element matching. 3rd order offset-frequency delta-sigma modulator reduces in-band spurs by 20dB in simulation and 8dB in current single-ended practice. The half-modulus divider relaxes the charge pump non-linearity requirement. The proposed two techniques have made the Delta--Sigma fractional- N synthesizer feasible to work for multi-band applications.