首页> 外国专利> ELECTROSTATIC DISCHARGE PROTECTION CIRCUITS USING POLARIZED AND CONNECTED PNP TRANSISTOR CHAINS

ELECTROSTATIC DISCHARGE PROTECTION CIRCUITS USING POLARIZED AND CONNECTED PNP TRANSISTOR CHAINS

机译:使用极化和连接的PNP晶体管链的静电放电保护电路

摘要

In device requiring ESD protection, a bias network (26) is used to augment the diode string to distribute small but significant forward current to the diodes. Also employed is the use of cantilever diodes (30) which provide PNP Darlington gain block for ESD protection rather than for amplifying signals in bipolar ICs. In one embodiment, the termination is the principal element of the device novelty and that which makes the device "stand alone". The termination supplies final base current to the gain block for a limited amount of time, so that ESD charge can be shunted harmlessly through the PNP chain, but assures that the structure draws no current from a stable power supply long term. The entire structure is able to absorb noise spikes as well as ESD pulses. The termination also makes provisions for discharging its capacitor between ESD pulses, as is necessary for standardized testing. The invention has value as an IC power supply clamp, and reduce the damage often seen on IC power supplies during extensive ESD testing. IMAGE
机译:在需要ESD保护的设备中,偏置网络(26)用于增加二极管串,以向二极管分配较小但重要的正向电流。还使用了悬臂二极管(30),该悬臂二极管提供PNP达林顿增益模块用于ESD保护,而不是用于放大双极IC中的信号。在一个实施例中,端接是设备新颖性的主要要素,并且使设备“独立”。终端在有限的时间内向增益模块提供最终的基本电流,从而可以通过PNP链无害地分流ESD电荷,但要确保该结构长期不从稳定的电源汲取电流。整个结构能够吸收噪声尖峰和ESD脉冲。终端还提供了在ESD脉冲之间对电容器放电的措施,这是标准化测试所必需的。本发明具有作为IC电源夹的价值,并减少了在广泛的ESD测试期间经常在IC电源上看到的损坏。 <图像>

著录项

  • 公开/公告号DE69535142T2

    专利类型

  • 公开/公告日2007-06-14

    原文格式PDF

  • 申请/专利权人 INTEL CORP.;

    申请/专利号DE1995635142T

  • 发明设计人

    申请日1995-03-27

  • 分类号H02H9;H02H9/04;H01L27/02;

  • 国家 DE

  • 入库时间 2022-08-21 20:27:30

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