首页>
外国专利>
Double-gate FET fabricating method, involves inverting and bonding assembly of gate and hard layer to substrate, forming another gate in gate cavity, siliciding defining layer, and depositing metal for producing source and drain electrodes
Double-gate FET fabricating method, involves inverting and bonding assembly of gate and hard layer to substrate, forming another gate in gate cavity, siliciding defining layer, and depositing metal for producing source and drain electrodes
The method involves forming a gate on an on-insulator semiconductor substrate, and depositing a hard layer (11) on the gate to act as an etching mask for defining a channel (2a) and a pad. A defining layer (17) is formed to define drain and source zones. An assembly of the gate and the hard layer is inverted and bonded to another substrate (20), and another gate is formed in a gate cavity (22) formed by a space defined by the pad. The defining layer is silicided, and a metal is deposited for producing metal source and drain electrodes.
展开▼