首页> 外国专利> Double-gate FET fabricating method, involves inverting and bonding assembly of gate and hard layer to substrate, forming another gate in gate cavity, siliciding defining layer, and depositing metal for producing source and drain electrodes

Double-gate FET fabricating method, involves inverting and bonding assembly of gate and hard layer to substrate, forming another gate in gate cavity, siliciding defining layer, and depositing metal for producing source and drain electrodes

机译:双栅极FET的制造方法,包括将栅极和硬层反转并结合到衬底上,在栅极腔中形成另一个栅极,硅化限定层,以及沉积金属以产生源极和漏极

摘要

The method involves forming a gate on an on-insulator semiconductor substrate, and depositing a hard layer (11) on the gate to act as an etching mask for defining a channel (2a) and a pad. A defining layer (17) is formed to define drain and source zones. An assembly of the gate and the hard layer is inverted and bonded to another substrate (20), and another gate is formed in a gate cavity (22) formed by a space defined by the pad. The defining layer is silicided, and a metal is deposited for producing metal source and drain electrodes.
机译:该方法包括在绝缘体上半导体衬底上形成栅极,以及在该栅极上沉积硬层(11)以用作用于限定沟道(2a)和焊盘的蚀刻掩模。形成限定层(17)以限定漏极和源极区。栅极和硬层的组件被反转并结合到另一基板(20),并且另一栅极形成在由焊盘限定的空间形成的栅极腔(22)中。限定层被硅化,并且沉积金属以产生金属源极和漏极。

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