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TESTING THE COMPLIANCE OF A DESIGN WITH THE SYNCHRONIZATION REQUIREMENTS OF A MEMORY MODEL
TESTING THE COMPLIANCE OF A DESIGN WITH THE SYNCHRONIZATION REQUIREMENTS OF A MEMORY MODEL
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机译:使用内存模型的同步要求测试设计的符合性
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摘要
A method for compliance testing of a circuit design that includes at least one processor and a memory includes defining a memory model. The memory model includes synchronization mechanisms for synchronizing access to the memory by software instructions in different program threads running on the at least one processor. Synchronization-related parameters, which are applicable to at least one sequence of the software instructions in the different program threads, are specified. A coverage model is defined as a multi-dimensional cross-product of values of the synchronization-related parameters. At least one test program is generated using the coverage model, and a compliance of the design with the memory model is tested by subjecting the design to the at least one test program.
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