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Semiconductor package having optimal interval between bond fingers for reduced substrate size

机译:半导体封装在键合指之间具有最佳间隔,可减小基板尺寸

摘要

A semiconductor package includes a semiconductor chip having a plurality of bonding pads, and a substrate having a first surface on which a plurality of bond fingers are arranged and a second surface on which ball lands connected to the bond fingers are formed. The bond fingers are arranged in a plurality of rows, and are formed in the shape of a polygon, such that overlapping surfaces of a bond finger of a row, which overlap with another bond finger of another row, have a constant slope, and overlapping surfaces of bond fingers arranged in the same row, which face each other, are sloped in opposite directions. Bond fingers of each row are positioned between the overlapping surfaces of bond fingers of another row, which face each other, such that the bond fingers of the rows are arranged in a zigzag pattern.
机译:半导体封装件包括:具有多个键合焊盘的半导体芯片;以及基板,该基板具有在其上布置有多个键合指的第一表面以及在其上形成有连接至键合指的球焊盘的第二表面。键合指布置成多行,并且形成为多边形形状,使得与另一行的另一个键合指重叠的一行键合指的重叠表面具有恒定的斜率,并且重叠。布置在同一行中的彼此面对的键合指的表面沿相反的方向倾斜。每行的接合指位于彼此面对的另一行的接合指的重叠表面之间,使得行的接合指以Z字形图案布置。

著录项

  • 公开/公告号US2008001273A1

    专利类型

  • 公开/公告日2008-01-03

    原文格式PDF

  • 申请/专利权人 JEONG HYUN PARK;

    申请/专利号US20060647927

  • 发明设计人 JEONG HYUN PARK;

    申请日2006-12-29

  • 分类号H01L23/02;

  • 国家 US

  • 入库时间 2022-08-21 20:12:42

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