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SYSTEM AND METHOD FOR CHECKING A LENGTH OF A WIRE PATH BETWEEN A CAPACITOR AND A VIA OF A PCB DESIGN
SYSTEM AND METHOD FOR CHECKING A LENGTH OF A WIRE PATH BETWEEN A CAPACITOR AND A VIA OF A PCB DESIGN
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机译:用于确定电容器和PCB设计之间的走线长度的系统和方法
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摘要
A method for checking a length of a wire path between a capacitor and a via of the PCB design is disclosed. The method includes: obtaining length criteria and information on capacitors from a database; selecting one or more capacitors and pins of selected capacitors from the obtained information on capacitors, and selecting one of the length criteria; obtaining positions of selected capacitors, and positions of vias corresponding to the positions of selected capacitors from the database; calculating each length of a wire path between a selected capacitor and a corresponding via according to the position of the capacitor and the position of the via; determining whether each calculated length of a wire path between a selected capacitor and a corresponding via is acceptable according to a comparison with the selected length criterion; and outputting check results of the determining step. A related system is also disclosed.
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