首页> 外国专利> Inter-metal dielectric of semiconductor device and manufacturing method thereof including plasma treating a plasma enhanced fluorosilicate glass

Inter-metal dielectric of semiconductor device and manufacturing method thereof including plasma treating a plasma enhanced fluorosilicate glass

机译:半导体器件的金属间电介质及其制造方法,包括等离子体处理等离子体增强的氟硅酸盐玻璃

摘要

An exemplary manufacturing method of an inter-metal dielectric of a semiconductor device according to an embodiment of the present invention includes forming a first silicon-rich oxide (SRO) layer on a silicon substrate provided with or otherwise having a copper line layer therein, forming a plasma enhanced fluorosilicate glass (PEFSG) layer on the first SRO layer, plasma-treating the PEFSG layer, and forming a second SRO layer on the plasma-treated PEFSG layer. According to the present invention, the thickness of the second SRO layer of the inter-metal dielectric can be reduced. Consequently, process cost can be reduced, and the total thickness of the inter-metal dielectric can be reduced so as to lower the dielectric constant thereof, reduce the aspect ratio of any via holes that are subsequently formed in the inter-metal dielectric, and potentially increase the yield as a result of the reduced via hole aspect ratio.
机译:根据本发明实施例的半导体器件的金属间电介质的示例性制造方法包括在其中设置有铜线层或以其他方式具有铜线层的硅基板上形成第一富硅氧化物(SRO)层,在第一SRO层上的等离子体增强氟硅酸盐玻璃(PEFSG)层,对PEFSG层进行等离子体处理,并在经过等离子体处理的PEFSG层上形成第二SRO层。根据本发明,可以减小金属间电介质的第二SRO层的厚度。因此,可以降低工艺成本,并且可以减小金属间电介质的总厚度,从而降低其介电常数,减小随后形成在金属间电介质中的任何通孔的纵横比,并且由于减小的通孔纵横比,可能会提高成品率。

著录项

  • 公开/公告号US7442653B2

    专利类型

  • 公开/公告日2008-10-28

    原文格式PDF

  • 申请/专利权人 TAE-YOUNG LEE;

    申请/专利号US20050316634

  • 发明设计人 TAE-YOUNG LEE;

    申请日2005-12-20

  • 分类号H01L21/31;

  • 国家 US

  • 入库时间 2022-08-21 20:11:17

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