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Three input field programmable gate array logic circuit configurable as a three input look up table, a D-latch or a D flip-flop
Three input field programmable gate array logic circuit configurable as a three input look up table, a D-latch or a D flip-flop
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机译:三输入现场可编程门阵列逻辑电路,可配置为三输入查找表,D锁存器或D触发器
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摘要
A field programmable gate array logic cell includes a logic circuit having three inputs and at least one output and a plurality of multiplexers having inputs and outputs. The logic circuit also includes a plurality of programmable elements coupled between the three inputs and at least one output of the logic circuit and the inputs and outputs of the plurality of multiplexers such that a plurality of sequential logic units and combinatorial units can be realized by programming selected ones of the programmable elements, the sequential logic units may include a flip-flop.
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