首页> 外国专利> System for coupling programmable logic device to external circuitry which selects a logic standard and uses buffers to modify output and input signals accordingly

System for coupling programmable logic device to external circuitry which selects a logic standard and uses buffers to modify output and input signals accordingly

机译:用于将可编程逻辑设备耦合到外部电路的系统,该系统选择逻辑标准并使用缓冲器相应地修改输出和输入信号

摘要

A programmable input/output device for use with a programmable logic device (PLD) is presented comprising an input buffer, an output buffer and programmable elements. The programmable elements may be programmed to select a logic standard for the input/output device to operate at. For instance, a given set of Select Bits applied to the programmable elements may select TTL logic, in which case the input and output buffers would operate according to the voltage levels appropriate for TTL logic (e.g., 0.4 volts to 2.4 volts). For a different set of Select Bits, the GTL logic standard would be applied (e.g., 0.8 volts to 1.2 volts). The invention enables a single PLD to be used in conjunction with various types of external circuitry.
机译:提出了一种与可编程逻辑器件(PLD)一起使用的可编程输入/输出设备,包括输入缓冲器,输出缓冲器和可编程元件。可编程元件可以被编程为选择用于输入/输出设备的逻辑标准。例如,施加给可编程元件的一组给定的选择位可以选择TTL逻辑,在这种情况下,输入和输出缓冲器将根据适合于TTL逻辑的电压电平(例如0.4伏至2.4伏)进行操作。对于一组不同的选择位,将应用GTL逻辑标准(例如0.8伏至1.2伏)。本发明使得单个PLD可以与各种类型的外部电路结合使用。

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