首页> 外国专利> DEEP SUBMICRON AND NANO CMOS SINGLE PHOTON PHOTODETECTOR PIXEL WITH EVENT BASED CIRCUITS FOR READOUT DATA-RATE REDUCTION

DEEP SUBMICRON AND NANO CMOS SINGLE PHOTON PHOTODETECTOR PIXEL WITH EVENT BASED CIRCUITS FOR READOUT DATA-RATE REDUCTION

机译:具有事件电路的深亚微米和纳米CMOS单光子光电检测器像素,可降低数据速率

摘要

An avalanche photodiode and a sensor array comprising an array of said avalanche photodiodes is disclosed. Then avalanche photodiode comprises a substrate of a first conductivity type; a first well of a second conductivity type formed within the substrate; a second well of the second conductivity type formed substantially overlying and extending into the first well; a heavily doped region of the first conductivity type formed substantially overlying and extending into the first well, the junction between the heavily doped region and the second well forming an avalanche multiplication region; a guard ring formed from a first conductivity material positioned substantially about the periphery of the multiplication region at least partially underlying the heavily doped region; and an outer well ring of the second conductivity type formed about the perimeter of the deep well and the guard ring. The sensor array comprises a plurality of pixel elements, each of the pixel elements being configured to operate on discrete value continuous time (DVCT) basis. Each of the pixel elements can include the avalanche photodiode previously described.
机译:公开了一种雪崩光电二极管和包括所述雪崩光电二极管的阵列的传感器阵列。然后,雪崩光电二极管包括第一导电类型的衬底。在衬底内形成第二导电类型的第一阱;第二导电类型的第二阱形成为基本上覆盖并延伸到第一阱中;第一导电类型的重掺杂区形成为基本上覆盖并延伸到第一阱中,重掺杂区和第二阱之间的结形成雪崩倍增区;由第一导电材料形成的保护环,该第一导电材料基本上位于倍增区的周围,至少部分地位于重掺杂区的下面;第二导电类型的外部阱环形成在深阱和保护环的周围。传感器阵列包括多个像素元件,每个像素元件被配置为以离散值连续时间(DVCT)为基础进行操作。每个像素元件可以包括先前描述的雪崩光电二极管。

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