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A DIVIDE-BY-4 PRESCALER FOR SUPERHIGH FREQUENCY OVER 10 GHZ

机译:超过10 GHZ的超高频率除以4的除法器

摘要

A divide-by-4 prescaler for a superhigh frequency over 10 GHz is provided to decrease a needed area by including a first divide-by-2 circuit with an inductor and a second divide-by-2 circuit without the inductor. A divide-by-4 prescaler(300) includes a first divide-by-2 circuit(310) and a second divide-by-2 circuit. The first divide-by-2 circuit of a charge injection locked frequency divider type has a pair of inductors(311,312), a pair of varactors(321,322) having one ends connected to one ends of the inductors, a pair of NMOS FETs(Field Effect Transistor)(331,332) of a common source type, and a pair of NMOS FETs(341,342) applied with a pair of high frequency input signals, and outputs output signals(Vout+,Vout-) divided-by-2 by receiving high frequency signals(Vin+,Vin-). The second divide-by-2 circuit of a current mode logic type does not have the inductor, and generates output signals additionally divided-by-2 by receiving the output signals of the first divide-by-2 circuit.
机译:通过在包括电感器的第一2分频电路和没有电感器的第二2分频电路中提供10 GHz以上超高频的4分频预分频器,以减少所需的面积。 4分频预分频器(300)包括第一2分频电路(310)和第二2分频电路。电荷注入锁定分频器类型的第一个2分频电路具有一对电感器(311,312),一对一端连接到电感器一端的变容二极管(321,322),一对NMOS FET(Field共源型的效应晶体管(331,332)和一对NMOS FET(341,342)施加了一对高频输入信号,并通过接收高频将输出信号(Vout +,Vout-)除以2信号(Vin +,Vin-)。电流模式逻辑类型的第二二分频电路不具有电感器,并且通过接收第一二分频电路的输出信号来生成另外被二分频的输出信号。

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