SEMICONDUCTOR DEVICE HAVING SPACER PATTERNS ON THE SIDEWALLS OF THE GATE PATTERN AND METHOD OF FABRICATING THE SAME

摘要

A semiconductor device having a spacer pattern formed at a sidewall of a gate pattern and a method for manufacturing the same are provided to prevent defects and to enhance reliability by preventing the short of a conductive layer which is caused by voids. A gate pattern(62) is formed on an upper surface of a semiconductor substrate(50). A barrier insulating layer(64) is formed on a sidewall and an upper surface of the gate pattern. A spacer pattern higher than the gate pattern is formed on the barrier insulating layer which is formed at both sidewalls of the gate pattern. The gate pattern includes a capping insulating layer(60) formed at an upper part thereof. The spacer pattern is formed on the barrier insulating layer of the sidewall of the gate pattern formed at a lower part of the capping insulating layer.