首页> 外国专利> Flat Panel Display Device using the directinal crystallization, The fabricating method of Electro Luminecence Display Device using directinal crystallization, semiconductor and The fabricating method of semiconductor using directinal crystallization

Flat Panel Display Device using the directinal crystallization, The fabricating method of Electro Luminecence Display Device using directinal crystallization, semiconductor and The fabricating method of semiconductor using directinal crystallization

机译:使用方向性结晶的平板显示装置,使用方向性结晶的电致发光显示装置的制造方法,半导体以及使用方向性结晶的半导体的制造方法

摘要

A flat panel display device using a directional crystallization method, a method for manufacturing the same, a semiconductor, and a method for manufacturing the same are provided to manufacture excellent poly crystal silicon by forming a less surface roughness. A substrate(101) has a pixel section(105) and a peripheral section(107). A buffer layer(102) is located on the substrate. A poly crystal silicon layer of the pixel section is located on the buffer layer. The poly crystal silicon layer includes a residual metal of less than 10^13 atom/cm^3. A poly crystal silicon layer(109) of the peripheral section is located on the buffer layer. The poly crystal silicon layer of the peripheral section is comprised of grain boundaries located toward a direction in parallel with a crystal growing direction. Surface roughness of the poly crystal silicon layer of the peripheral section is less than 15 nm. Gate electrodes are respectively located to correspond to a region of the poly crystal silicon layer of the pixel section and the peripheral section. A gate dielectric insulates the poly crystal silicon layer and the gate electrode. Source/drain electrodes are connected to a part of the poly crystal silicon layer of the pixel section and the peripheral section. The pixel section includes a first electrode, an organic light emitting layer, and a second electrode.
机译:提供一种使用定向结晶法的平板显示装置,其制造方法,半导体以及制造方法,以通过形成较小的表面粗糙度来制造优良的多晶硅。基板(101)具有像素部分(105)和外围部分(107)。缓冲层(102)位于基板上。像素部分的多晶硅层位于缓冲层上。多晶硅层包括小于10 ^ 13atom / cm ^ 3的残留金属。外围部分的多晶硅层(109)位于缓冲层上。外围部分的多晶硅层由位于与晶体生长方向平行的方向上的晶界构成。外围部分的多晶硅层的表面粗糙度小于15nm。栅电极分别定位为对应于像素部分和外围部分的多晶硅层的区域。栅极电介质使多晶硅层和栅电极绝缘。源/漏电极连接到像素部分和外围部分的多晶硅层的一部分。像素部分包括第一电极,有机发光层和第二电极。

著录项

  • 公开/公告号KR100860008B1

    专利类型

  • 公开/公告日2008-09-25

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20070027141

  • 申请日2007-03-20

  • 分类号H01L29/786;

  • 国家 KR

  • 入库时间 2022-08-21 19:51:37

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