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A process for the preparation of a gate contact structure of a trench - high power transistor, and to this method is high power transistor

机译:一种制备沟槽的栅极接触结构的工艺-高功率晶体管,而这种方法就是高功率晶体管

摘要

A process for producing a gate contact structure during the production of a trench high power transistor, comprises preparing a semiconductor substrate, forming a trench in the substrate, precipitating a gate dielectric (1) onto the inner walls of the trench, and precipitating a field oxide. The gate oxide is precipitated followed by a gate material (3). The gate material is then polyrecess etched. The liner (4) is then precipitated, and the liner and the intermediate oxide (5) are selectively etched. The liner consists of silicon nitride or oxynitride.
机译:在沟槽高功率晶体管的制造过程中用于制造栅极接触结构的方法,包括制备半导体衬底,在衬底中形成沟槽,将栅极电介质(1)沉淀到沟槽的内壁上以及沉淀场氧化物。沉积栅极氧化物,然后沉积栅极材料(3)。然后对栅极材料进行多凹槽蚀刻。然后使衬里(4)沉淀,并选择性地腐蚀衬里和中间氧化物(5)。衬里由氮化硅或氮氧化物组成。

著录项

  • 公开/公告号DE10354421B4

    专利类型

  • 公开/公告日2008-09-25

    原文格式PDF

  • 申请/专利权人

    申请/专利号DE2003154421

  • 发明设计人

    申请日2003-11-21

  • 分类号H01L21/336;H01L29/78;

  • 国家 DE

  • 入库时间 2022-08-21 19:50:09

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