Circuit arrangement with a device for recognition of attempted manipulation and method for the recognition of attempted manipulation in the case of a circuit arrangement

摘要

The arrangement has data lines of a dual-rail-data bus or a memory circuit with memory cells that are connected with complementary data lines (bx, bxq, bl, blq). A logical state or an electrical potential is received in a pre-loading phase of the complementary data lines. A device for detecting manipulation tests has a detector circuit (23), which outputs an alarm signal (Alrm) in a normal operating phase of the lines during occurrence of the logical state in the complementary data lines. Independent claims are also included for the following: (1) a memory circuit for a circuit arrangement (2) a method of detecting manipulation tests with a circuit arrangement.