Integrated circuit i.e. memory chip, is tested in test operation mode by adjusting operating condition of voltage generator for producing load voltage for associated integrated load as function of external control signal

摘要

The integrated circuit (1) is tested in a test operation mode (TB) by adjusting an operating condition of an integrated voltage generator (2) for producing a load voltage (ULast) for an associated integrated load (7) as a function of an external control signal (CKEext). The load voltage is controllable by an internal control switching signal (CRTLS) at the integrated load. An integrated voltage generator test logic (11) is attached to and switches the voltage generator between an active operating condition (AZ) and a standby operating condition (SZ). Independent claims are also included for the following: (1) a method for testing an integrated circuit (2) a test system for testing an integrated circuit.