首页> 外国专利> Charge pump for a non-volatile storage with read-only resolution in the presence of address slopes, and non-volatile storage with such a charge pump

Charge pump for a non-volatile storage with read-only resolution in the presence of address slopes, and non-volatile storage with such a charge pump

机译:用于在存在地址斜率的情况下具有只读分辨率的非易失性存储器的电荷泵,以及具有这种电荷泵的非易失性存储器

摘要

Described herein is a charge pump (12') for a nonvolatile memory (1'), comprising a clock generator circuit (22') supplying an output clock signal (CK); a phase generator circuit (24) receiving the output clock signal (CK), and supplying phase signals (A, B, C, D); and a voltage booster circuit (16) receiving a supply voltage (VCC) supplied from outside to the nonvolatile memory (1') and the aforesaid phase signals (A, B, C, D), and supplying a read voltage (VREAD) higher than the supply voltage (VCC). The clock generator circuit (22') comprises a comparator (40) receiving the read voltage (VREAD) and a reference voltage (VREF1), and supplying a selection signal (SEL) indicating the outcome of the comparison between said voltages; and a multiplexer (42) receiving a first input clock signal (CKP) having a pre-set frequency, a second input clock signal (CKATD) having a frequency correlated to the transition frequency of the addresses (ADD) supplied to the nonvolatile memory (1'), and the selection signal (SEL), and supplying the aforesaid output clock signal (CK). IMAGE
机译:本文描述了一种用于非易失性存储器(1')的电荷泵(12'),其包括提供输出时钟信号(CK)的时钟发生器电路(22');相位发生器电路(24)接收输出时钟信号(CK),并提供相位信号(A,B,C,D);升压电路(16),其接收从外部提供给非易失性存储器(1')的电源电压(VCC)和上述相位信号(A,B,C,D),并提供较高的读取电压(VREAD)超过电源电压(VCC)。时钟发生器电路(22’)包括比较器(40),该比较器(40)接收读取电压(VREAD)和参考电压(VREF1),并提供指示所述电压之间的比较结果的选择信号(SEL)。复用器(42)接收具有预设频率的第一输入时钟信号(CKP),具有与提供给非易失性存储器(ADD)的地址(ADD)的转换频率相关的频率的第二输入时钟信号(CKATD)( 1')和选择信号(SEL),并提供前述的输出时钟信号(CK)。 <图像>

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