Microelectronics device realizing method for self-aligned double gate transistor, involves depositing gate metallic material layer to fill hole, where filled hole forms interconnection element between material blocks

摘要

The method involves forming a stack on a substrate e.g. silicon on insulator (SOI) substrate, where the stack has a gate dielectric layer supported on a material block of a transistor lower gate, another gate dielectric layer supported on a channel semiconductor zone, and a gate material layer (121) of another material block of a transistor upper gate supported on the latter layer. A hole uncovering the former block is realized via the layers. A gate metallic material layer (122) is deposited to fill the hole, where the filled hole forms an interconnection element (140) between the blocks. An independent claim is also included for a microelectronics device with a double gate structure for a transistor.