Bitline contact plug formation method for flash memory manufacture, involves forming contact hole in inter-layered dielectric layer that covers conductive layer and fills gap between respective gate conducting structures

摘要

An inter-layered dielectric (ILD) layer (72) with planarized surface, is formed on a semiconductor substrate (50) comprising gate conducting structures, to cover a conductive layer and to fill gap between respective conducting structures. A bitline contact hole formed in the ILD layer, is filled with a conductive layer, to function as bitline contact plug.