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Exploring methods of interconnect effort in nanotechnology
Exploring methods of interconnect effort in nanotechnology
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机译:探索纳米技术中互连工作的方法
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摘要
Methods and apparatus for estimating the propagation delay along a logical signal path are described herein. The methods and apparatus account for the behavior of multi-stage logic gates along a signal path, initial input transition times, inter-stage fanouts, as well as different logic gate types. The methods and apparatus convert signal transition features into an effective fanout to provide estimates of gate delay dependencies on input slope and gate logic topology.
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