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PERFORMANCE MONITORS IN A MULTITHREADED PROCESSOR ARCHITECTURE

机译:多线程处理器体系结构中的性能监视器

摘要

A system comprising a plurality of execution units configured to execute, at least in part, a plurality of instruction threads; a plurality of performance monitors, each performance monitor being configured to collect performance information related to the execution of at least one instruction thread; a selected thread identifier configured to provide, during operation, the selection of at least one instruction thread; and a performance manager configured to filter, utilizing the selected thread, the information collected by the plurality of performance monitors.
机译:一种系统,包括:多个执行单元,被配置为至少部分地执行多个指令线程;以及多个性能监视器,每个性能监视器被配置为收集与至少一个指令线程的执行有关的性能信息;选定线程标识符,被配置为在操作期间提供至少一个指令线程的选择;性能管理器,配置为利用所选线程过滤由多个性能监视器收集的信息。

著录项

  • 公开/公告号US2009089014A1

    专利类型

  • 公开/公告日2009-04-02

    原文格式PDF

  • 申请/专利权人 VLADIMIR SILYAEV;DARREN NEUMAN;

    申请/专利号US20070864368

  • 发明设计人 VLADIMIR SILYAEV;DARREN NEUMAN;

    申请日2007-09-28

  • 分类号G06F15/00;

  • 国家 US

  • 入库时间 2022-08-21 19:32:29

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