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Superthreading: Integrating compilation technology and processor architecture for cost-effective concurrent multithreading

机译：SuperThreading：集成编译技术和处理器架构以实现经济效益的并发多线程

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作者
Tsai, Jenn-Yuan.;
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作者单位

University of Illinois at Urbana-Champaign.;

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授予单位 University of Illinois at Urbana-Champaign.;
学科
学位 Ph.D.
年度 1998
页码 116 p.
总页数 116
原文格式 PDF
正文语种 eng
中图分类
关键词
Compilation; Multithreading; Parallel processing; Processor architecture; Superthreading;

机译：汇编;多线程;并行处理;处理器架构;超曲面;
入库时间 2022-08-17 12:03:36

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专利

1. The superthreaded processor architecture [J] . Jenn-Yuan Tsai, Jian Huang IEEE Transactions on Computers . 1999,第9期

机译：超线程处理器架构
2. Compilation and Worst-Case Reaction Time Analysis for Multithreaded Esterel Processing [J] . Marian Boldt, Claus Traulsen, Reinhard von Hanxleden EURASIP journal on embedded systems . 2008,第1期

机译：多线程酯处理的编译和最坏情况反应时间分析
3. The integration of process analytical technologies, concurrent validation, and parametric release programs in aseptic processing. [J] . Korczynski MS PDA journal of pharmaceutical science and technology . 2004,第4期

机译：在无菌处理中集成了过程分析技术，并发验证和参数发布程序。
4. An efficient strategy for developing a simulator for a novel concurrent multithreaded processor architecture [C] . Jian Huang, Lilja, D.J. . 1998

机译：为新型并发多线程处理器体系结构开发模拟器的有效策略
5. Designing cost-effective secure processors for embedded systems: Principles, challenges, and architectural solutions. [D] . Rogers, Austin. 2010

机译：为嵌入式系统设计经济高效的安全处理器：原理，挑战和体系结构解决方案。
6. Speedup bioinformatics applications on multicore-based processor using vectorizing and multithreading strategies [O] . Kridsadakorn Chaichoompu, Surin Kittitornkun, Sissades Tongsima 2007

机译：使用矢量化和多线程策略在基于多核的处理器上加速生物信息学应用程序
7. An Efficient Strategy for Developing a Simulator for a Novel Concurrent Multithreaded Processor Architecture [O] . Jian Huang, David J. Lilja 1998

机译：为新型并发多线程处理器体系结构开发模拟器的有效策略

Superthreading: Integrating compilation technology and processor architecture for cost-effective concurrent multithreading

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