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Device and method for limiting Di/Dt caused by a switching FET of an inductive switching circuit
Device and method for limiting Di/Dt caused by a switching FET of an inductive switching circuit
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机译:限制由感应开关电路的开关FET引起的Di / Dt的装置和方法
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摘要
A circuit for limiting di/dt caused by a main switching FET during its turn-off against an inductive switching circuit is proposed. The circuit for limiting di/dt includes:;An auxiliary inductor in series with the main switching FET for inducing an auxiliary inductive voltage proportional to di/dt.;An auxiliary FET in parallel with the main switching FET. The auxiliary FET gate is connected to produce a gate voltage equal to the auxiliary inductive voltage. When the di/dt tends to exceed a pre-determined maximum rate of decrease, the auxiliary FET produces an auxiliary current component counteracting further decrease of the di/dt.;The main switching FET and the auxiliary FET can be formed from a single die with shared source and drain. The auxiliary inductor can be implemented as a parasitic inductance of an inherently required bonding wire connecting the main switching FET to its device terminal to simplify packaging with reduced cost.
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