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Back-to-front via process

机译:通过流程从后到前

摘要

A method performed on a semiconductor chip having a doped semiconductor material abutting a substrate involves creating a first via through at least a portion of the substrate extending from an outer side of the substrate towards the doped semiconductor material, the first via having a wall surface and a bottom, introducing a first electrically conductive material into the first via so as to create an electrically conductive path, creating a second via, aligned with the first via, extending from an outer surface of the doped portion of the semiconductor chip to the bottom, and introducing a second electrically conductive material into the second via so as to create an electrically conductive path.
机译:在具有与衬底邻接的掺杂半导体材料的半导体芯片上执行的方法包括:穿过衬底的至少一部分形成第一通孔,该第一通孔从衬底的外侧朝着掺杂半导体材料延伸,该第一通孔具有壁表面和底部,将第一导电材料引入到第一通孔中以形成导电路径,形成与第一通孔对准的第二通孔,第二通孔从半导体芯片的掺杂部分的外表面延伸到底部,将第二导电材料引入第二通孔中以形成导电路径。

著录项

  • 公开/公告号US7534722B2

    专利类型

  • 公开/公告日2009-05-19

    原文格式PDF

  • 申请/专利权人 JOHN TREZZA;

    申请/专利号US20060329574

  • 发明设计人 JOHN TREZZA;

    申请日2006-01-10

  • 分类号H01L21/44;H01L21/4763;H01L29/40;H01L23/52;H01L23/48;H01L23/40;

  • 国家 US

  • 入库时间 2022-08-21 19:30:27

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