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CMOS circuits including a passive element having a low end resistance

机译:包括具有低端电阻的无源元件的CMOS电路

摘要

The present invention relates to complementary metal-oxide-semiconductor (CMOS) circuits, as well as methods for forming such CMOS circuits. More specifically, the present invention relates to CMOS circuits that contain passive elements, such as buried resistors, capacitors, diodes, inductors, attenuators, power dividers, and antennas, etc., which are characterized by an end contact resistance of less than 90 ohm-microns. Such a low end resistance can be achieved either by reducing the spacer widths of the passive elements to a range of from about 10 nm to about 30 nm, or by masking the passive elements during a pre-amorphization implantation step, so that the passive elements are essentially free of pre-amorphization implants.
机译:本发明涉及互补金属氧化物半导体(CMOS)电路,以及形成这种CMOS电路的方法。更具体地,本发明涉及包含无源元件的CMOS电路,该无源元件例如埋入的电阻器,电容器,二极管,电感器,衰减器,功率分配器和天线等,其特征在于端接触电阻小于90欧姆。 -微米。通过将无源元件的间隔物宽度减小到大约10 nm至大约30 nm的范围,或者通过在预非晶化注入步骤中掩盖无源元件,可以实现这种低端电阻。基本上没有预非晶化植入物。

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