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Clock distribution circuits and methods of operating same that use multiple clock circuits connected by phase detector circuits to generate and synchronize local clock signals

机译:时钟分配电路及其操作方法,其使用由相位检测器电路连接的多个时钟电路来生成和同步本地时钟信号

摘要

Multiple clock circuits are connected by phase detector circuits to generate and synchronize local clock signals. For example, a clock distribution circuit includes a first clock circuit that is configured to generate a first clock signal in response to a first error signal, and a second clock circuit that is configured to generate a second clock signal in response to the first error signal. A first phase detector circuit connects the first clock circuit to the second clock circuit and is configured to generate the first error signal in response to the first and the second clock signals.
机译:多个时钟电路由相位检测器电路连接,以生成并同步本地时钟信号。例如,时钟分配电路包括被配置为响应于第一误差信号而生成第一时钟信号的第一时钟电路以及被配置为响应于第一误差信号而生成第二时钟信号的第二时钟电路。 。第一相位检测器电路将第一时钟电路连接到第二时钟电路,并且被配置为响应于第一时钟信号和第二时钟信号而产生第一误差信号。

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