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Maintaining data integrity for extended drop outs across high-speed serial links
Maintaining data integrity for extended drop outs across high-speed serial links
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机译:维护数据完整性,以扩展跨高速串行链路的中断
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摘要
Improved error correction techniques and circuitry are provided. The error correction circuitry may be integrated with a programmable logic device (PLD), or it may be wholly or partly on a separate integrated circuit. The circuitry may be capable of providing data recovery during extended drop out periods of a high speed serial link with an embedded clock signal.
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