METHOD FOR FORMING A STRAINED TRANSISTOR BY STRESS MEMORIZATION BASED ON A STRESSED IMPLANTATION MASK

摘要

Title: METHOD FOR FORMING A STRAINED TRANSISTOR BY STRESS MEMORIZATION BASED ON A STRESSED IMPLANTATION MASK[err] Abstract: By using an implantation mask having a high intrinsic stress, stress memorization technique (SMT) sequences maybe provided in which additional lithography steps may be avoided. Consequently, a strain source may be provided without signifi-cantly contributing to the overall process complexity.