首页> 外国专利> TAGGING AND ARBITRATION MECHANISM IN AN INPUT/OUTPUT NODE OF COMPUTER SYSTEM

TAGGING AND ARBITRATION MECHANISM IN AN INPUT/OUTPUT NODE OF COMPUTER SYSTEM

机译:计算机系统输入/输出节点的标记和仲裁机制

摘要

Tagging and arbitration mechanism in an input / output node of a computer system is disclosed. A mechanism for tagging commands in an input / output node of a computer system includes a tag circuit (510) configured to receive a plurality of control commands. The tag circuit may also be configured to generate a tag value for each of the control commands. The tagging mechanism may also include a buffer circuit (505) coupled to the tag circuit. The buffer circuit may include a plurality of the plurality of the buffers belonging to the virtual channel corresponding to each of the virtual channels, wherein each of the virtual channels for storing selected control commands. Further the tagging mechanism may include an arbitration circuit (520) configured to perform arbitration between said plurality of buffers based on the tag value for each of the control command, coupled to the buffer circuit. ; The tag circuit, an arbitration circuit, a buffer circuit, a virtual channel, the channel disclosure, non-disclosure channel
机译:公开了计算机系统的输入/输出节点中的标记和仲裁机制。一种用于在计算机系统的输入/输出节点中标记命令的机制,包括被配置为接收多个控制命令的标记电路(510)。标签电路还可以被配置为针对每个控制命令生成标签值。标记机构还可以包括耦合到标记电路的缓冲电路(505)。缓冲器电路可以包括属于与每个虚拟通道相对应的虚拟通道的多个缓冲器中的多个,其中每个虚拟通道用于存储选择的控制命令。进一步,标记机制可以包括仲裁电路(520),该仲裁电路(520)耦合到缓冲器电路,该仲裁电路(520)基于针对每个控制命令的标签值在所述多个缓冲器之间执行仲裁。 ;标签电路,仲裁电路,缓冲电路,虚拟通道,通道公开,非公开通道

著录项

  • 公开/公告号KR100905802B1

    专利类型

  • 公开/公告日2009-07-02

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20047005559

  • 发明设计人 에니스스테펜씨.;

    申请日2002-08-09

  • 分类号G06F13/40;

  • 国家 KR

  • 入库时间 2022-08-21 19:11:49

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