首页> 外国专利> MEMORY CONTROLLER AND METHOD OF ADJUSTING CONTROL SIGNAL OUTPUT TIMING OF THE SAME

MEMORY CONTROLLER AND METHOD OF ADJUSTING CONTROL SIGNAL OUTPUT TIMING OF THE SAME

机译:存储器控制器和调整其相同的控制信号输出时序的方法

摘要

PROBLEM TO BE SOLVED: To easily recognize relation between a memory control signal and a clock and to enlarge a margin to the setup hold of the memory control signal and the clock.;SOLUTION: A memory controller for writing data to a semiconductor memory device is provided with: a phase adjustment circuit for delaying a control signal for controlling the semiconductor memory device and outputting it to the semiconductor memory device; and a data strobe monitoring circuit for monitoring a data strobe signal inputted from the semiconductor memory device in response to the control signal and outputting a response signal corresponding to the response time from the output of the control signal to the input of the data strobe signal. The delay amount of the phase adjustment circuit is set to a value shifted to the front or back of the delay amount with which the timing of outputting the response signal is changed when the control signal is outputted to the semiconductor memory device while successively increasing the delay amount and the timing of outputting the response signal is monitored.;COPYRIGHT: (C)2010,JPO&INPIT
机译:解决的问题:轻松识别存储控制信号和时钟之间的关系,并扩大存储控制信号和时钟的设置保持空间;解决方案:用于将数据写入半导体存储设备的存储控制器是设置有:相位调整电路,用于延迟用于控制半导体存储器件的控制信号并将其输出到半导体存储器件;数据选通监视电路,用于响应于控制信号监视从半导体存储器件输入的数据选通信号,并从控制信号的输出到数据选通信号的输入输出与响应时间相对应的响应信号。相位调整电路的延迟量被设置为偏移到延迟量的前面或后面的值,当将控制信号输出到半导体存储器件时,通过该延迟量来改变响应信号的输出定时,同时依次增加延迟监控输出响应信号的数量和时间。COPYRIGHT:(C)2010,JPO&INPIT

著录项

  • 公开/公告号JP2010182115A

    专利类型

  • 公开/公告日2010-08-19

    原文格式PDF

  • 申请/专利权人 RICOH CO LTD;

    申请/专利号JP20090025291

  • 发明设计人 SAZUKA AKIFUMI;IWASAKI KEIICHI;

    申请日2009-02-05

  • 分类号G06F12/00;

  • 国家 JP

  • 入库时间 2022-08-21 19:06:06

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