And semiconductor inductor forming method of the semiconductor inductor (on-chip inductor design rules)

摘要

And an on-chip inductor having an inductor Q values ​​are [Problems] improved semiconductor device of the sub-100 nm, to provide a program and method for manufacturing a device. SOLUTION: A specific width is disposed on the dielectric surface, is determined as a function of design rule checking rules each, height, spacing, and has a cross-sectional area, the parallel metal it is a plurality of spaced an inductor including a line is provided. Planarization process for a single rule, the metal density ratio of metal to the surface of the dielectric 20% 80% are determined and produced. In one embodiment, the sum of the separation gap between the metal lines is less than the sum of the height of the inner sidewall metal lines. In one embodiment, the height of the line width, and at least one of the line spacing dimension, but the yield of the chip, chip performance, manufacturability of the chip, and the parameters of one or more of the Q value of the inductor is chosen to optimize. [Selection Figure Figure 3