首页> 外国专利> DIGITAL PHASE INTERPOLATION CONTROL FOR CLOCK AND DATA RECOVERY CIRCUIT

DIGITAL PHASE INTERPOLATION CONTROL FOR CLOCK AND DATA RECOVERY CIRCUIT

机译:时钟和数据恢复电路的数字相位插值控制

摘要

This invention discloses a phase interpolation controller for a clock and data recovery circuit receiving an indication of a phase relationship between a first and a second signal, the phase interpolation controller comprises a plurality of serially coupled bi-directional shift-registers, wherein when the received indication indicates the first signal is ahead of the second signal in phase, the plurality of serially coupled bi-directional shift-registers shifts in one of the bi-directions, and when the received indication indicates the first signal is behind the second signal in phase, the plurality of serially coupled bi-directional shift-registers shifts in the other of the bi-directions.
机译:本发明公开了一种用于时钟和数据恢复电路的相位内插控制器,用于接收第一和第二信号之间的相位关系的指示,该相位内插控制器包括多个串行耦合的双向移位寄存器,其中当接收到指示指示第一信号在同相第二信号之前,多个串行耦合的双向移位寄存器在一个双向偏移,并且当接收到的指示指示第一信号在同相第二信号之后多个串联耦合的双向移位寄存器在另一个双向中移位。

著录项

  • 公开/公告号US2010098203A1

    专利类型

  • 公开/公告日2010-04-22

    原文格式PDF

  • 申请/专利权人 JINN-YEH CHIEN;

    申请/专利号US20080254753

  • 发明设计人 JINN-YEH CHIEN;

    申请日2008-10-20

  • 分类号H04L7;

  • 国家 US

  • 入库时间 2022-08-21 18:55:17

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