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Semiconductor integrated circuit, design support software system, and automatic test pattern generation system

机译:半导体集成电路,设计支持软件系统和自动测试图案生成系统

摘要

A semiconductor integrated circuit has a memory circuit having memory cells, a first register, a second register, a register selection circuit having an input to which an output of the first register and an output of the second register are connected, a memory bypass circuit which is located between a first switching circuit and a second switching circuit, and connected to the inputs and the outputs of the memory circuit. The register selection circuit is switched to the output signals of the first register when performing testing by way of the memory circuit, and switched to output signals of the second register when performing testing by way of the memory bypass circuit.
机译:半导体集成电路具有:存储器电路,其具有存储器单元;第一寄存器;第二寄存器;寄存器选择电路,其输入与第一寄存器的输出和第二寄存器的输出连接;存储器旁路电路,其在第一开关电路和第二开关电路之间设置有第一电容器C1和第二电容器B2,并且该第一电容器C1和第二电容器B2连接到存储电路的输入和输出。当通过存储器电路执行测试时,寄存器选择电路切换到第一寄存器的输出信号,并且当通过存储器旁路电路执行测试时,寄存器选择电路切换到第二寄存器的输出信号。

著录项

  • 公开/公告号US7797591B2

    专利类型

  • 公开/公告日2010-09-14

    原文格式PDF

  • 申请/专利权人 TETSU HASEGAWA;CHIKAKO TOKUNAGA;

    申请/专利号US20090503336

  • 发明设计人 CHIKAKO TOKUNAGA;TETSU HASEGAWA;

    申请日2009-07-15

  • 分类号G11C29/00;

  • 国家 US

  • 入库时间 2022-08-21 18:51:13

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