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Implementing local evaluation of domino read SRAM with enhanced SRAM cell stability with minimized area usage
Implementing local evaluation of domino read SRAM with enhanced SRAM cell stability with minimized area usage
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机译:以最小的面积使用实现增强的SRAM单元稳定性的多米诺读SRAM的本地评估
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摘要
A method and circuit for implementing domino static random access memory (SRAM) local evaluation with enhanced SRAM cell stability, and a design structure on which the subject circuit resides are provided. A SRAM local evaluation circuit enabling a read and write operations of an associated SRAM cell group includes true and complement bitlines, true and complement write data propagation inputs, a precharge signal, and a precharge write signal. A respective precharge device is connected between a voltage supply VDD and the true bitline and the complement bitline. A first passgate device is connected between the complement bitline and the true write data propagation input. A second passgate device is connected between the true bitline and the complement write data propagation input. The precharge write signal disables the passgate devices during a read operation. During write operations, the precharge write signal enables the passgate devices.
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