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Method and system for enhancing yield of semiconductor integrated circuit devices using systematic fault rate of hole

机译:利用孔的系统故障率提高半导体集成电路器件成品率的方法和系统

摘要

A method of enhancing yield of semiconductor integrated circuit includes determining multiple experimental values, each experimental value corresponding to a distance from a side of a hole to an opposing side of a shape surrounding the hole, forming test patterns representing each of the experimental values on a wafer and calculating experimental value-based systematic fault rates from the test patterns; converting the experimental value-based systematic fault rates of the hole into the experimental value-based systematic fault rates, calculating a length of a side of the hole for which a distance between the side of the hole and the opposing side of the shape corresponds to each of experimental values, and calculating a systematic fault rate of the hole using the experimental value-based systematic fault rates per unit hole length and the length of the sides of the hole calculated for the respective experimental values in the desired layout.
机译:一种提高半导体集成电路产量的方法,包括确定多个实验值,每个实验值对应于从孔的一侧到围绕孔的形状的相对侧的距离,在基板上形成表示每个实验值的测试图案。晶片并根据测试图案计算基于实验值的系统故障率;将孔的基于实验值的系统故障率转换为基于实验值的系统故障率,计算孔的侧面的长度,孔的侧面与形状的相对侧面之间的距离对应于该长度每个实验值,并使用基于实验值的每孔单位长度的系统故障率和为所需布局中的各个实验值计算出的孔的侧面长度来计算孔的系统故障率。

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