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Wideband phase-locked loop with adaptive frequency response that tracks a reference

机译:具有自适应频率响应并跟踪参考的宽带锁相环

摘要

A self-tuning 3rd order type III phase-locked loop (PLL) is disclosed. In one aspect, the PLL provides frequency control that is implemented in three (3) parallel paths. The PLL provides frequency response tracking using a number of elements including a triple control voltage-controlled oscillator (VCO), a frequency-to-current (F2I) converter, and a switched capacitor loop filter. In addition to compensation for feedback ratio variation, near constant F2I gain over process variations and switched capacitor filters synchronized to a reference signal, near constant VCO gain over process variations allows the open loop frequency response to be tailored to track the reference signal. A high-speed locking technique is employed which significantly reduces acquisition time in low bandwidth cases. This PLL may be fabricated in a 0.18 μm CMOS logic process.
机译:公开了一种自调谐三阶III型锁相环(PLL)。一方面,PLL提供了在三(3)个并行路径中实现的频率控制。 PLL使用包括三重控制压控振荡器(VCO),频率电流(F2I)转换器和开关电容器环路滤波器在内的许多元件来提供频率响应跟踪。除了补偿反馈比率变化,在过程变化上获得接近恒定的F2I增益以及与参考信号同步的开关电容器滤波器之外,在过程变化上获得接近恒定的VCO增益,还可以调整开环频率响应来跟踪参考信号。采用了高速锁定技术,可在低带宽情况下显着减少采集时间。该PLL可以0.18μmCMOS逻辑工艺制造。

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