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CMOS-compatible bulk-micromachining process for single-crystal MEMS/NEMS devices

机译:用于单晶MEMS / NEMS器件的CMOS兼容体微加工工艺

摘要

A process producing a single-crystalline device fabricated on a single-sided polished wafer employing processing from only the front-side and having a significant separation between the device and substrate is provided. In one embodiment, a method comprises an upper layer and a lower substrate. A device is formed in the upper layer, defined by gaps. The gaps are filled with at least one material that has etch characteristics different from those of the device and the substrate. At least a top portion of the gap material is removed from the upper layer. The gap material is etched so that a portion of the gap-material remains on the sidewalls of the surrounding upper layer. The material beneath the device is then etched, excluding an insulating layer beneath the device, releasing the device from the substrate. The insulating material beneath the device is then etched, the etch being selective to the insulating material and the gap material.
机译:提供了一种仅在正面上进行处理并且在装置和基板之间具有显着间隔的制造在单面抛光晶片上制造的单晶装置的方法。在一个实施例中,一种方法包括上层和下基板。在由间隙限定的上层中形成器件。间隙填充有至少一种蚀刻特性不同于器件和基板的材料。从上层去除间隙材料的至少顶部。蚀刻间隙材料,使得一部分间隙材料保留在周围的上层的侧壁上。然后蚀刻该器件下方的材料,排除该器件下方的绝缘层,从而将该器件从衬底释放。然后蚀刻器件下方的绝缘材料,该蚀刻对绝缘材料和间隙材料是选择性的。

著录项

  • 公开/公告号US7749789B2

    专利类型

  • 公开/公告日2010-07-06

    原文格式PDF

  • 申请/专利权人 DEMETRIOS P PAPAGEORGIOU;

    申请/专利号US20080050206

  • 发明设计人 DEMETRIOS P PAPAGEORGIOU;

    申请日2008-03-18

  • 分类号H01L21/20;

  • 国家 US

  • 入库时间 2022-08-21 18:48:24

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