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Method of manufacturing semiconductor device capable of suppressing impurity concentration reduction in doped channel region arising from formation of gate insulating film

机译:能够抑制由栅极绝缘膜的形成引起的掺杂沟道区域中的杂质浓度降低的半导体器件的制造方法

摘要

A method of manufacturing a semiconductor device is provided that can suppress impurity concentration reduction in a doped channel region arising from formation of a gate insulating film. With a silicon oxide film (20) and a silicon nitride film (21) being formed, p-type impurity ions (23.sub.1, 23.sub.2) are implanted in a Y direction from diagonally above. As for an implant angle .alpha. of the ion implantation, an implant angle is adopted that satisfies the relationship tan−1 (W2/T)α≦tan−1 (W1/T), where W1 is an interval between a first portion (211) and a fourth portion (214) and an interval between a third portion (213) and a sixth portion (216); W2 is an interval between a second portion (212) and a fifth portion (215); T is a total film thickness of the silicon oxide film (20) and the silicon nitride film (21). When the implant angle α is controlled within that range, impurity ions (231, 231) are implanted into a second side surface (10A2) and a fifth side surface (10A5) through a silicon oxide film (13).
机译:提供一种制造半导体器件的方法,其可以抑制由于形成栅极绝缘膜而导致的掺杂沟道区中的杂质浓度降低。在形成氧化硅膜( 20 )和氮化硅膜( 21 )的情况下,p型杂质离子( 23 1、23 .sub.B> 2 )从对角线上方沿Y方向植入。至于植入角α。对于离子注入,采用满足tan -1 (W 2 / T)<α≦tan -1 的关系的注入角。 (W 1 / T),其中W 1 是第一部分( 21 1 )与第一部分之间的间隔第四部分( 21 4 )和第三部分( 21 3 )与第六部分之间的间隔( 21 6 ); W 2 是第二部分( 21 2 )和第五部分( 21 5 ); T是氧化硅膜( 20 )和氮化硅膜( 21 )的总膜厚。当将注入角α控制在该范围内时,注入杂质离子( 23 1 ,23 1 )通过A进入第二侧面( 10 A 2 )和第五侧面( 10 A 5 )氧化硅膜( 13 )。

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