首页>
外国专利>
METHOD FOR MANUFACTURING A VERTICAL SEMICONDUCTOR, CAPABLE OF PREVENTING A PILLAR FROM INCLINING BY NOT INCREASING AN ASPECT RATIO OF A VERTICAL GATE
METHOD FOR MANUFACTURING A VERTICAL SEMICONDUCTOR, CAPABLE OF PREVENTING A PILLAR FROM INCLINING BY NOT INCREASING AN ASPECT RATIO OF A VERTICAL GATE
展开▼
机译:制造垂直半导体的方法,该方法能够通过不增加垂直门的纵横比来防止支柱倾斜
展开▼
页面导航
摘要
著录项
相似文献
摘要
PURPOSE: A method for manufacturing a vertical semiconductor is provided to prevent an upper side of a pillar from being damaged due to the etching and etch back process by forming a hard mask pattern stacking a first hard mask nitride film, a hard mask poly film, and a second hard mask nitride film.;CONSTITUTION: A hard mask pattern(203) is formed on a silicon substrate(201). A pad oxide film(202), a first hard mask nitride film(203a), a second hard mask nitride film(203c) are formed on the silicon substrate. A photosensitive pattern to define a pillar region is formed by exposing and developing the photosensitive pattern. The pillar is formed by etching the silicon substrate using the hard mask pattern as the etching mask. A gate electrode is formed on the surface of the pillar. A surrounding gate electrode is formed by removing a gate electrode on the upper surface of the pillar.;COPYRIGHT KIPO 2010
展开▼