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WAFER LEVEL CHIP SIZE PACKAGE OF A SEMICONDUCTOR DEVICE BY HOLE CONNECTION TO MINIMIZE THE LENGTH OF WIRING AND A MANUFACTURING METHOD THEREOF
WAFER LEVEL CHIP SIZE PACKAGE OF A SEMICONDUCTOR DEVICE BY HOLE CONNECTION TO MINIMIZE THE LENGTH OF WIRING AND A MANUFACTURING METHOD THEREOF
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机译:通过孔连接来最小化接线长度的半导体装置的晶圆级晶片尺寸封装及其制造方法
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摘要
PURPOSE: A wafer level chip size package of a semiconductor device by hole connection and a manufacturing method thereof are provided to prevent light loss and improve the sensitivity of the image sensor and image quality.;CONSTITUTION: A wafer level chip size package of a semiconductor device by hole connection comprises a substrate in which a plurality of semiconductor devices and an electrode pad are formed, a through hole which is formed in contact with the electronic pad on a dicing street, an insulating layer which is formed on the back side of the through hole and the substrate, a metal seed layer which is formed on the back side of the insulating layer and the substrate, a penetrating electrode which is formed on the top of the electrode pad and inside of the through hole, and a bump which is formed in the penetrating electrode.;COPYRIGHT KIPO 2010
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