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SOI TRANSISTOR WITH SELF-ALIGNED MASS PLAN AND GRID AND VARIABLE THICKNESS OXIDE

机译:具有自定质量计划和网格和可变厚度氧化层的SOI晶体管

摘要

A self-aligned gate transistor (100) with a grid (116) and a ground plane (104a) comprising: - a semiconductor-based substrate (102); - a portion (104a) of organometallic material having a first face disposed thereon facing one side of the substrate, forming the ground plane of the transistor, - a dielectric layer (106) having a first face disposed against a second face of the portion of organometallic material opposite to the first face of the portion of material organometallic portions, - dielectric portions (120, 124) disposed between the face of the substrate and the first face of the dielectric layer, around the portion of organometallic material, a section, in a plane substantially parallel to the face of the substrate, of the gate of the transistor being substantially equal to a section of the portion of organometallic material in said plane.
机译:一种具有栅格(116)和接地平面(104a)的自对准栅晶体管(100),包括:-基于半导体的衬底(102); -有机金属材料的一部分(104a),其上设置有第一表面,该第一表面面对衬底的一侧,形成晶体管的接地平面;-介电层(106),其第一表面紧靠该部分的第二表面。与材料有机金属部分的第一面相对的有机金属材料,-介电部分(120、124),位于衬底的表面和介电层的第一面之间,围绕该部分有机金属材料,一部分基本上平行于衬底表面的平面,晶体管的栅极基本上等于所述平面中有机金属材料部分的截面。

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