And a method for non-volatile memory for the page, between pages on-chip data pseudo-randomized

摘要

The mechanism of the integrated circuit memory chip, to enable the randomization or scrambling of data stored in non-volatile memory cell array. In one embodiment, in order to suppress the floating gate to floating gate coupling of the neighboring cell and the load source of error detection during the help page randomization. Page unit randomization serves to reduce program disturb resulting from being stored for a long period of time a specific data pattern is repeated, the user read disturb, the floating gate to floating gate coupling. In another embodiment, to perform both paged randomized and randomized page. It is user-driven randomized, or the code generator of pseudorandom randomization or scrambling or is predetermined in some embodiments. These mechanisms are achieved in a budget resources and the limited integrated circuit memory chip.