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Production method pattern verification method, pattern verification system, the mask, a method of manufacturing a semiconductor device

机译:图案验证方法,图案验证系统,掩模,半导体装置的制造方法的制造方法

摘要

PPROBLEM TO BE SOLVED: To improve the TAT (turn around time) of a verification process flow between a desired pattern and a mask pattern. PSOLUTION: The method includes steps of: preparing a desired pattern and a mask pattern corresponding to the desired pattern; setting one or more evaluation points at an edge of the desired pattern; calculating the light intensity at the evaluation point at a best focus time by using a calculation formula for light intensity; obtaining a prime differential value at the evaluation point in the calculation formula at the best focus time; calculating the light intensity at the evaluation point at a defocus time by using the calculation formula for light intensity; obtaining a prime differential value at the evaluation point in the calculation formula at the defocus time; obtaining a margin of exposure luminous energy from the prime differential values at the best focus time and the defocus time; and verifying the layout from the difference in the light intensity between the best focus time and the defocus time, the obtained margin of exposure luminous energy and preliminarily determined specifications. PCOPYRIGHT: (C)2009,JPO&INPIT
机译:

要解决的问题:为了提高所需图案和掩膜图案之间的验证处理流程的TAT(周转时间)。

解决方案:该方法包括以下步骤:准备期望的图案和与期望的图案相对应的掩模图案;在所需图案的边缘设置一个或多个评估点;通过使用光强度的计算公式来计算在最佳聚焦时间的评估点处的光强度;在最佳聚焦时间,在计算公式中的评估点处获得素差值;通过使用光强计算公式,计算散焦时评估点处的光强;在散焦时,在计算公式中的求值点求出本征微分值;在最佳聚焦时间和散焦时间,由本征微分值获得曝光发光能量的余量;根据最佳聚焦时间和散焦时间之间的光强度差,所获得的曝光发光能量裕度和预先确定的规格来验证布局。

版权:(C)2009,日本特许厅&INPIT

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