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Method and Apparatus of ATE IC Scan Test Using FPGA-Based System

机译:基于FPGA的系统进行ATE IC扫描测试的方法和装置

摘要

An apparatus and a method for enhancing the use of automated test equipment (ATE), are presented. The apparatus comprises a test load board that mounts a plurality of devices to be tested (DUTs), and a daughter card communicating with the test board and the ATE, testing each of the plurality of devices, and providing test results to the ATE. The method comprises mounting a plurality of devices to be tested on the test load board, using the daughter card to communicate with the test board and the ATE, and using the daughter card for testing each of the plurality of DUTs, providing test results to the ATE. Also provided is a system to perform automated tests of integrated chips, comprising an ATE scan test unit, an off-load tester resource coupled to the ATE scan test unit, a processor executing commands to control the ATE unit and the off-load tester resource.
机译:提出了一种用于增强自动化测试设备(ATE)的使用的设备和方法。该设备包括:测试负载板,其安装有多个要测试的设备(DUT);以及子卡,其与测试板和ATE通信,测试多个设备中的每一个,并将测试结果提供给ATE。该方法包括将多个要测试的设备安装在测试负载板上,使用子卡与测试板和ATE通信,并使用子卡来测试多个DUT中的每个,将测试结果提供给测试设备。 ATE。还提供了一种执行对集成芯片的自动化测试的系统,该系统包括ATE扫描测试单元,耦合到ATE扫描测试单元的卸载测试器资源,执行命令以控制ATE单元的处理器和卸载测试器资源的处理器。 。

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