Controllable readout circuit for performing a self-referenced read operation on a memory device comprising a plurality of magnetic random access memory (MRAM) cells comprising a selecting device for selecting one of the MRAM cells, and a sense circuit for sourcing a sense current to measure the first and second resistance value; the sense circuit comprising a sample and hold circuit for performing said storing said first resistance value, and a differential amplifier circuit for performing said comparing the second resistance value to the stored first resistance value; wherein the controllable readout circuit further comprises a control circuit adapted to provide a pulse-shaped timing signal with a pulse duration controlling the duration of the first read cycle and the second read cycle. The controllable readout circuit allows for controlling the duration of the first and second read cycles after completion of the MRAM cell and readout circuit fabrication.
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