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Peak-hold circuit and signal strength indicator using the peak-hold circuit
Peak-hold circuit and signal strength indicator using the peak-hold circuit
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机译:峰值保持电路和使用该峰值保持电路的信号强度指示器
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摘要
A peak-hold circuit includes a differential amplifier having first and second transistors as a differential pair, the first transistor receiving an input signal at its gate, a third transistor connected between a first power supply and an output node connecting a gate of the second transistor, connectivity of the third transistor being controlled by the output of the differential amplifier, a capacitor for holding a peak voltage, connected between the output node and a second power supply, a resistor for discharging, which is connected in parallel to the capacitor, and a fourth transistor connected to the first transistor in parallel, the fourth transistor receiving at its gate an a reference voltage for limiting a voltage.
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